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Cominlabs RELIASIC: a new circuit sent to foundry

RELIASIC: computation on unreliable architectures

In the context of the CominLabs RELIASIC project, the IAS team of lab-STICC has just sent to foundry an ASIC (Application Specific Integrated Circuit) designed in 28 nm process technology.

PRASYS Seminar - Tuesday 22 January 2019 - 1:30 PM

Amphi 3, Ensta Bretagne, 2 rue François Verny Brest

'A lesson from Mother Nature: biologically inspired processing techniques in automatic target recognition',  Professor Hugh GRIFFITHS, 2017 IEEE Picard Medal, University College LondonAbstract: Automatic Target Recognition is an important set of tech...

The project “Non-Binary LDPC Codes” awarded by the BPO Foundation

Emmanuel Boutillon was awarded by the Banque Populaire de l'Ouest (BPO) Foundation for his project “Non-Binary LDPC Codes”, supported by Ouest Valorisation. The BPO Foundation is supporting local scientists in their research and innovation project

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Int. Symp. on Turbo Codes & Iterative Information Processing

ISTC was held for the first time in Asia in last December

The 10th International Symposium on Turbo Codes & Iterative Information Processing (ISTC 2018), sponsored by the IEEE Information Theory Hong Kong Chapter, was successfully held from 3 to 7 December 2018 at the Hong Kong Polytechnic University.