News

One month - One person - January 2018

Associate Prof. Cyrille Chavet

Published 1/25/2018

Every month, meet one person from Lab-STICC, exchange, share views, learn who he/she is. Assoc. Prof. Dr Cyrille Chavet will introduce this new section.

portrait

Dr. Chavet Cyrille is associate professor at the Université de Bretagne-Sud and has accepted to initiate this new section "One month - One person" on our web-site. Cyrille joined the Lab-STICC at its creation in 2008.

Keywords that define Cyrille's activity: Computer Aided Design & Exploration tools High Level Synthesis Hardware architecture

Lab-STICC: Cyrille, Many thanks for answering this interview.

Can you describe your research activity in a few lines?

My current research interests are twofold: (1) exploring new formal methods and associated tools in order to solve access conflicts and/or optimize memory access in parallel architectures. Error Correcting Codes Architectures are a good example of such problems, but it can be generalized to other research fields. (2) exploring the generation of post-quantum cryptographic architecture with a high level synthesis tool (GAUT) developped since more than 15 years in our team. The lastest version of GAUT has just been released by the end of 2017.

What is your best contribution to research so far?

It is difficult to choose ONE contribution. If I have to select one research project, I would say GRAAL. This project results from one of our patents. All these patents have initiate a series of projects such as GIGADEC, GRAAL and now FlexDEC-5G, but they have also contributed to the publication of a book (Springer, 2015) and several papers in many conferences (ICASSP, ISCAS, GLS-VLSI, DATE).

What did you learn last month that deserve to be shared here?

Well, I was in Nantes by the end of 2017, for a cyber-security training provided by SERMA security, and that was really really interesting. I will present this training during our next "Hard Days' Live", CACS/MOCS meetings dedicated to hardware design. Feel free to join us if you are interested, for that contact me at  cyrille.chavet@univ-ubs.fr.

What are your plans for the next months?

I have currently three IEEE transaction papers I am working on : one currently on revision, one will be sent to the editor within a month, and I will join colleagues on the third one after that. I am waiting for the results of the first selection step of an ANR JCJC, and in parallel I am still working on FlexDEC-5G (2017-2019) with academic and industrial partners.

Tell us a nice story about your career:

Well, I will not choose one story, but I want to say that working with PhD students can be a great experience, even if sometimes it could be difficult, we always shared some "cool research" instants. You know, this particularly enjoyable feeling of the moment when your brain goes faster than your thoughts... and you reach THE point. That's great, team brainstorming is great and I do my best to be able live again this feeling!

What can you bring to the Lab-STICC for helping and improving the structure?

That is a good question, thanks... I would say my "willingness" ?

Contact Cyrille Chavet

Display the whole heading

©2016-2018 Azimut - Website design & Interactive kiosks Legal information | Site map